1. Field of the Invention
The present invention relates to a dry etching method and a dry etching apparatus, and, more particularly, to a dry etching method and apparatus suitable for fine anisotropic patterning on a semiconductor.
2. Description of the Related Art
Anisotropic patterning is important in the fine patterning of semiconductor integrated circuits. In particular, dynamic random access memories (DRAMs), having a high degree of integration, require ultra fine patterning for etching the gate and storage capacitor of the MOS transistors that constitute a DRAM. Preferably, highly anisotropic patterning is realized through dry etching.
Recently, to increase the degree of integration on the DRAM, the storage capacitor has been formed on the MOS transistor. To pattern the storage capacitor, step etching has been necessary. In highly anisotropic etching, etching residue is produced on the step wall when the etching step only performs etching for film thickness. To remove the etching residue, overetching is necessary (that is, etching of more than the film thickness).
One example of an overetching method is disclosed in Japanese Patent Application Laid-Open No. 61-61423. As disclosed, a side-wall protective film is formed after the etching step before removing the etching residue through isotropic etching. To prevent an underlayer from being cut during the overetching, the method disclosed in Japanese Patent Application Laid-Open No. 63-65628 includes highly-selective etching after the formation of a side-wall protective film.
Frequently, the gate and storage capacitor of the MOS transistor are formed of polycrystalline silicon, or polycide. A method for etching polycrystalline silicon or polycide with a resist mask and chlorine- or bromine-based gas plasma is shown in "26p-ZF-1" and "26p-ZF-4" of the 51st Japan Society of Applied Physics Autumn Meeting in 1990.
The method disclosed in Japanese Patent Application Laid-Open No. 2-105413 improves the etching anisotropy by changing gases to correspond to the fine patterning. The method realizes a high anisotropy by periodically changing an etching gas and a depositing gas.
To further improve the degree of element integration, a vertical shape should be formed through highly anisotropic etching. However, the side wall should be tapered by giving an angle to it, depending upon the patterning condition after etching. An example of tapered etching is given in Proceedings of Symposium on Dry Process (1986), page 48, in which a depositing gas is added. Further, Japanese Patent Application Laid-Open No. 1-32633 discloses a method for performing tapered etching by utilizing the substrate temperature to control the side etching speed.
Previous techniques for changing to isotropic etching, or periodically changing the etching gas and depositing gas during overetching, require change of etching gas. Therefore, the throughput decreases because of the excessive time to change gases, and the process conditions should be optimized for each etching gas.
The known method for utilizing a resist mask and chlorine- or bromine-based gas plasma for the etching of polycrystalline silicon produces reaction products in the mask and etched layer that are activated in the plasma and reattached to a sample. This deposition from the reaction products acts as a side-wall protective film to prevent side etching, so that highly anisotropic etching can be performed. However, the amount of the deposition from the reaction products is not conventionally controlled. Therefore, excessive amounts of deposition of reaction products may produce dust and cause the yield to decrease.
When forming a side-wall protective film, the amount of deposition from reaction products changes during the etching step. For example because the etching speed is not completely constant for a single wafer, and because the thickness of an etched layer is not completely uniform, the area of the etched layer slowly decreases immediately before the etching step ends. Accordingly, the amount of reaction product deposition decreases because the number of reaction products to be produced decreases. That is, the thickness of the side-wall protective film decreases immediately before the etching step ends. As a result, the side-wall protective film becomes thin around the interface between the etched layer and the underlayer. This thin portion of the protective film is subject to breakage, causing abnormal side etching around the interface.
Previous methods for performing tapered etching by adding a deposit gas have resulted in dust production and yield decrease. Controlling the tapered etching by controlling the substrate temperature has been difficult to carry out because of the difficulty in stably controlling the substrate temperature, and because much time is required to adjust the substrate temperature for fine control.